Abstract In this short

In this short, based on the physical mechanism together with a reasonable transistor size, a robust 10T memory cell is the first proposed to improve the level of reliability in the environment of aerospace radiation, maintaining the main advantages of small area, low power, and high stability. Using Taiwan Semiconductor Manufacturing Company Standard commercial process of 65 nm CMOS, simulations performed in Tanner tool demonstrate the capacity of the proposal 10T cell hardened by radiation to tolerate both 0 to 1 And 1 to 0 upsets with single node, with both read / write operations can be accessed.

SRAMs have been widely adopted in various aerospace electronic systems, and play an important role in the delay, area, power and criticality Reliability In aerospace applications, SRAMs have a fundamental limit this constitutes a challenge in the reliability induced by energy particles. Therefore, disturbed individual events (SEUs) represent a serious reliability error mechanism that can cause a malfunction of an electronic system override the stored value. When the load the particle hits a sensitive node of an integrated circuit, the charge along its path can be collected and accumulated efficiently through drift processes. Once a transient voltage pulse is generated of the accumulated load is above the switching threshold of the circuit, the value stored in this sensitive node will be changed.

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However, it is the fact that the SRAM cell which is of 6T is usually built using two cross coupling inverters and the value modified in a stored node can also activate the positive feedback mechanism to flip the state to another sensitive node so that an error occurs in memory Because this corrupt information can be completely recovered from overwriting operations, this phenomenon is also reported as soft errors.

In general, with the resizing of the CMOS process technology, the SRAM cells are more vulnerable to this reliability challenge due to the increase density, reduction of critical load and reduction of supply voltage. Therefore, the robustness of the soft error with the hardened radiation Design techniques (RHBD) are an increasingly important prerequisite in aerospace applications for the reasons described above and cosmic radiation environment more complex and proposing is the new high efficiency and high reliability RHBD memory cell it is necessary.

Recently, there are many remarkable radiations hardened by design cell studies had been reported based on circuit level redundancy or redesigning a memory cell to provide fault tolerable capability. For example, the RHBD memory cells like PS-10T and NS-10T memory cells which use stacked structure. The defect of the design that it can provide only one SEU robustness that is NS-10T cell provide 0 to 1 SEU instead of 1 to 0, whereas PS-10T cell has the ability to tolerate both 0 to 1 and 1 to 0 SEUs but incapable of doing action. An RHBD Quatro-10T memory cell has proposed to reduce only 1 to 0 SEU by relying on a negative feedback.
In a RHBD 11T memory cell, this still stores value by blocking the feedback path to prevent the induced transient impulse that affects the next nodes. Nevertheless, for this RHBD 11T memory cell, due to the single-ended structure, differential writing and reading capabilities are not enabled, which may increase the operating time. In a DICE memory cell, it is proposed using 12 transistors, which uses two interlocked latch pair to store the complementary values ??so that the effected values can be recovered to its original value using positive feedbacks. Redesigning a cell structure and using a shallow trench insulation technique, a RHBD 12T memory cell is proposed at the cost of large area above the head. However, the common disadvantage of 11T, Dice and 12T cells indicate that their general areas are larger. Hence, all the previous RHBD cells are not suitable for aerospace applications in which the RHBD memory cells with efficient area and high reliability properties are necessary to offer appropriate designs reliability systems
In order to solve this contradiction, a novel area-efficient, low-power, and high-reliability RHBD 10T memory cell is proposed using a circuit-level hardening technique. According to SEU physical theory together with reasonable transistor size, it can provide high radiation hardening capability at the cost of write and read access times. Intuitively, this brief is mainly organized as follows.



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